About that simple hardware RNG

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The idea:  noise from an avalanching diode is applied to the input of an
8 bit shift register.  The SR is clocked at some fairly high sampling
rate.  The 8 bits are made available on the printer port.

The questions: Does the RNG need to accumulate bits, or can it simply
present the most recent 8 random bits from the diode?  (I imagine
there'll have to be a protection against reading again before the SR has
flushed)  How fast can you sample an avalanching diode?  (how many
bits/second can I expect to harvest?)  Would a less-than-quartz-accurate
sampling rate be acceptable?  (555s, resistors and caps are cheaper than
oscillator modules)  Or would a device driver to supply the sampling
frequency be acceptable?  What if someone (Mallet?) hacks the driver?
(the driver is admittedly less portable)

One last question... what aesthetics apply here?  Would cypherpunks
abide a largish box, or shun anything larger than a typical dongle?
(smaller usually equals more expensive)
- -- 
Roy M. Silvernail --  roy@cybrspc.mn.org will do just fine, thanks.
          "Does that not fit in with your plans?"
                      -- Mr Wiggen, of Ironside and Malone (Monty Python)
          PGP public key available upon request (send yours)

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> The idea:  noise from an avalanching diode is applied to the input of an
> 8 bit shift register.  The SR is clocked at some fairly high sampling
> rate.  The 8 bits are made available on the printer port.
The shift register and timer probably involves 2 microchips.  Why not just
use 8 avalanching diodes, one for each bit.  Infact, you can use 13 if you
use the other printer-port input lines.